Did you always want one weird extra peripheral on your microcontroller? Do you know a bit of Verilog?
If so, this is a great opportunity to get your very own design integrated into a Risc-V SoC and made in silicon! And it's free to take part.
@tinytapeout.com.bsky.social
Tiny Tapeout makes it easier and cheaper than ever to get your designs manufactured on a real chip! https://tinytapeout.com
Did you always want one weird extra peripheral on your microcontroller? Do you know a bit of Verilog?
If so, this is a great opportunity to get your very own design integrated into a Risc-V SoC and made in silicon! And it's free to take part.
ASICs are cool.
FPGAs are β€οΈ.
FPGA brother to tinytapeout ASIC by Michael Bell aka @rebelmike.bsky.social
@tinytapeout.com @mattvenn.net @urishaked.bsky.social
A terminal window with text like "pass basics/set_copy.py" on each line, showing the tests are passing.
Watching the #Micropython test suite running on TinyQV, my Risc-V SoC. An increasing number of tests pass π
With the #TinyTapeout competition using it, I'm trying to make sure there's no lurking issues!
If you want to take part, check out @mattvenn.net 's stream today at 17:00 CEST when he'll show what's involved to make a submission.
bsky.app/profile/matt...
Tomorrow on the open source silicon stream, I'll be looking at what's involved to submit to the @tinytapeout.com #RISCV competition.
Stream starts at 8:00 PT / 17:00 CEST / 21:30 IST
www.youtube.com/live/7VM_dW1...
#opensourcesiliconstream #ASIC
If you want to try some ASIC design, this looks like a great opportunity.
25.07.2025 15:27 β π 4 π 1 π¬ 0 π 0Please repost for reach!
25.07.2025 10:57 β π 0 π 0 π¬ 0 π 0Want to help build a crowdsourced microcontroller?
You're invited to design peripherals (UARTs, timers, synths, etc.) for a @riscv.org.web.brid.gy chip that will be fabbed for real!
Take part for free!
tinytapeout.com/competitions...
2025 One Hertz Challenge: A 555, but not as we know it
22.07.2025 20:10 β π 3 π 3 π¬ 0 π 0Join me today on the #opensourcesiliconstream to catch up on the latest news and then make a simple quadrature encoder peripheral for the @tinytapeout.com RISC-V competition!
www.youtube.com/live/2JTFwLV...
On the stream today I'll be chatting with @rebelmike.bsky.social about the upcoming RISC-V Tiny Tapeout competition.
#opensourcesiliconstream #ASIC #TinyTapeout
www.youtube.com/watch?v=qGC9...
My TT06 board arrived!
I don't have a design on this but I intend to try RISC-V SoCs on this.
@tinytapeout.com @mattvenn.net
Hands-on experience is key in learning analog design - but waiting months for a tapeout slows everything down.
Peter Kinget built MOSbius, an "analog FPGA" that lets students experiment with real circuits in real time.
Full interview: www.youtube.com/watch?v=abu3...
Our chip viewer just got an upgrade: now you can see microscope images, GDS, local interconnect and jump straight to project files. Spot something cool? Dive right into the design.
Explore TT07 here: tinytapeout.com/decap/tt07
Try out our new layer selections with the button at the top right.
Should we make a mini MOSbius and include it on all our future tapeouts?
25.06.2025 12:46 β π 0 π 0 π¬ 0 π 0180 GHz amplifer design with open source tools? Check out my interview with Shafin here:
www.youtube.com/watch?v=RFPe...
#ASIC #opensource #RF
60,000:1 CMOS inverter scale model - now with magnets!
Get his little brother at the @tinytapeout.com store:
store.tinytapeout.com/products/Sky...
#ASIC #CMOS
We're back after a 3 week pause! Join me today at 17:00 CEST for the next installment of the open source silicon stream.
After catching up on the news we'll take a look at the Renaldas Zioma's Z80 and try to run some programs.
#opensource #silicon #stream
www.youtube.com/watch?v=6ERv...
#Z80 #opensource #silicon #ASIC
28.05.2025 14:15 β π 1 π 0 π¬ 0 π 0Design details: tinytapeout.com/runs/tt07/tt...
Watch the interview: youtube.com/watch?v=GI1e...
Order your own copy of the chip here: store.tinytapeout.com/products/TT0...
This is the moment Rej's open source Z80 woke up and said hello!
After Zilogβs April 2024 announcement, ReJ quickly taped out a drop-in replacement to preserve retrocomputing and legacy systems.
Taped out on TT07, it's a landmark in democratizing chip design.
Yesterday I submitted my first #generative art piece to be baked into a chip! π€―
Huge thanks to @tinytapeout.com for the collaboration. Excited to explore silicon as a medium.
Catch the full stream here: www.youtube.com/watch?v=HSV3...
(featuring @psychogenic.bsky.social discussing spASICs! π)
Today!
05.05.2025 11:03 β π 1 π 1 π¬ 0 π 0We recently sat down with Tibor Herman to talk about HUNITY, the satellite thatβs taking our chips to space.
We dug into past missions, how it maneuvers in orbit and the test framework thatβll run your code.
Catch the full interview here: youtu.be/SRuBDMZZiI0
You can test remotely!
25.04.2025 15:21 β π 2 π 0 π¬ 1 π 0For more details: www.linkedin.com/feed/update/...
25.04.2025 10:09 β π 0 π 0 π¬ 0 π 0IHP25b - our 4th open source chip with IHP is now open for digital design submissions!
Weβre very happy to have our next shuttle open and weβre already looking forward to seeing another great set of designs manufactured onto custom silicon!
Giving a @tinytapeout.com workshop at hardwear.io USA 2025 (Friday May 30). Hope to see you there!
hardwear.io/usa-2025/spe...
Weβre close to making key decisions about future shuttlesβand we want your input! π¬
What features matter most? Whatβs your price ceiling?
Take our 2-min survey π forms.gle/EMrSJQ6dmw4P...
π One respondent will win a beautiful 150mm silicon wafer!
Here's a video of the testing I did
youtu.be/4fpqKfqd39Q?...