arXiv cs.AR Hardware Architecture

Abhishek Vijaya Kumar, Eric Ding, Arjun Devraj, Rachee Singh: Morphlux: Programmable chip-to-chip photonic fabrics in multi-accelerator servers for ML https://arxiv.org/abs/2508.03674 https://arxiv.org/pdf/2508.03674 https://arxiv.org/html/2508.03674

Li, Abdurraman, Cleaveland, Legtchenko, Levis, Stefanovici, Tambe, Tennenhouse, Trippel: Towards Memory Specialization: A Case for Long-Term and Short-Term RAM https://arxiv.org/abs/2508.02992 https://arxiv.org/pdf/2508.02992 https://arxiv.org/html/2508.02992

Dongho Yoon, Gungyu Lee, Jaewon Chang, Yunjae Lee, Dongjae Lee, Minsoo Rhu: Mamba-X: An End-to-End Vision Mamba Accelerator for Edge Computing Devices https://arxiv.org/abs/2508.02977 https://arxiv.org/pdf/2508.02977 https://arxiv.org/html/2508.02977

[2025-08-06 Wed (UTC), 2 new articles found for csAR Hardware Architecture]

Sefatun-Noor Puspa, Mashrur Chowdhury: GPU in the Blind Spot: Overlooked Security Risks in Transportation https://arxiv.org/abs/2508.01995 https://arxiv.org/pdf/2508.01995 https://arxiv.org/html/2508.01995

Rajeev Patwari, Ashish Sirasao, Devleena Das: Forecasting LLM Inference Performance via Hardware-Agnostic Analytical Modeling https://arxiv.org/abs/2508.00904 https://arxiv.org/pdf/2508.00904 https://arxiv.org/html/2508.00904

Yuqi Xue, Jian Huang: ReGate: Enabling Power Gating in Neural Processing Units https://arxiv.org/abs/2508.02536 https://arxiv.org/pdf/2508.02536 https://arxiv.org/html/2508.02536

Fangxin Liu, Haomin Li, Bowen Zhu, Zongwu Wang, Zhuoran Song, Habing Guan, Li Jiang: ASDR: Exploiting Adaptive Sampling and Data Reuse for CIM-based Instant Neural Rendering https://arxiv.org/abs/2508.02304 https://arxiv.org/pdf/2508.02304 https://arxiv.org/html/2508.02304

Lu Chen, Dingyi Zhao, Zihao Yu, Ninghui Sun, Yungang Bao: GSIM: Accelerating RTL Simulation for Large-Scale Designs https://arxiv.org/abs/2508.02236 https://arxiv.org/pdf/2508.02236 https://arxiv.org/html/2508.02236

Kanellopoulos, Sgouras, Kakolyris, Nitu, Konar, Bera, Mutlu: Revelator: Rapid Data Fetching via OS-Driven Hash-based Speculative Address Translation https://arxiv.org/abs/2508.02007 https://arxiv.org/pdf/2508.02007 https://arxiv.org/html/2508.02007

M, O'Mahoney, Werle, Shanker, Nikolopoulos, Ji, Vandierendonck, John: MARVEL: An End-to-End Framework for Generating Model-Class Aware Custom RISC-V Extensions for Lightweight AI https://arxiv.org/abs/2508.01800 https://arxiv.org/pdf/2508.01800 https://arxiv.org/html/2508.01800

Mitra, Banerjee, Dixon, Govindaraju, Hochschild, Liu, Parthasarathy, Ranganathan: Silent Data Corruption by 10x Test Escapes Threatens Reliable Computing https://arxiv.org/abs/2508.01786 https://arxiv.org/pdf/2508.01786 https://arxiv.org/html/2508.01786

Wang, Bertuletti, Zhang, Jung, Benini: A Dynamic Allocation Scheme for Adaptive Shared-Memory Mapping on Kilo-core RV Clusters for Attention-Based Model Deployment https://arxiv.org/abs/2508.01180 https://arxiv.org/pdf/2508.01180 https://arxiv.org/html/2508.01180

[2025-08-05 Tue (UTC), 7 new articles found for csAR Hardware Architecture]

Daichi Mukunoki: DGEMM without FP64 Arithmetic -- using FP64 Emulation and FP8 Tensor Cores with Ozaki Scheme https://arxiv.org/abs/2508.00441 https://arxiv.org/pdf/2508.00441 https://arxiv.org/html/2508.00441

Islam, Ferrer, Alam, Mendez, Mamaluy, Pan, Aziz: Reimagining Voltage-Controlled Cryogenic Boolean Logic Paradigm with Quantum-Enhanced Josephson Junction FETs https://arxiv.org/abs/2508.00295 https://arxiv.org/pdf/2508.00295 https://arxiv.org/html/2508.00295

Nikolai Sergeev: Generative Logic: A New Computer Architecture for Deterministic Reasoning and Knowledge Generation https://arxiv.org/abs/2508.00017 https://arxiv.org/pdf/2508.00017 https://arxiv.org/html/2508.00017

Ma, Lin, Li, Quan, Zhou, Zhang, Zhong, Jia, Zhu, Meng, Zhou, An: E2ATST: A Temporal-Spatial Optimized Energy-Efficient Architecture for Training Spiking Transformer https://arxiv.org/abs/2508.00475 https://arxiv.org/pdf/2508.00475 https://arxiv.org/html/2508.00475

[2025-08-04 Mon (UTC), 1 new article found for csAR Hardware Architecture]

Sirine Arfa, Bernhard Vogginger, Christian Mayr: Hardware-Aware Fine-Tuning of Spiking Q-Networks on the SpiNNaker2 Neuromorphic Platform https://arxiv.org/abs/2507.23562 https://arxiv.org/pdf/2507.23562 https://arxiv.org/html/2507.23562

Oliver Bause, Julia Werner, Paul Palomero Bernardo, Oliver Bringmann: Smart Video Capsule Endoscopy: Raw Image-Based Localization for Enhanced GI Tract Investigation https://arxiv.org/abs/2507.23398 https://arxiv.org/pdf/2507.23398 https://arxiv.org/html/2507.23398

Xueying Wu, Baijun Zhou, Zhihui Gao, Yuzhe Fu, Qilin Zheng, Yintao He, Hai Li: KLLM: Fast LLM Inference with K-Means Quantization https://arxiv.org/abs/2507.23035 https://arxiv.org/pdf/2507.23035 https://arxiv.org/html/2507.23035

[2025-08-01 Fri (UTC), no new articles found for csAR Hardware Architecture]

Nasrin Akbari, Mehdi Modarressi, Alireza Khadem: A Customized Memory-aware Architecture for Biological Sequence Alignment https://arxiv.org/abs/2507.22221 https://arxiv.org/pdf/2507.22221 https://arxiv.org/html/2507.22221

[2025-07-31 Thu (UTC), 1 new article found for csAR Hardware Architecture]

Wenbo Liu, Forbes Hou, Jon Zhang, Hong Liu, Allen Lei: A Multi-Agent Generative AI Framework for IC Module-Level Verification Automation https://arxiv.org/abs/2507.21694 https://arxiv.org/pdf/2507.21694 https://arxiv.org/html/2507.21694

Linye Wei, Jiajun Tang, Fan Fei, Boxin Shi, Runsheng Wang, Meng Li: No Redundancy, No Stall: Lightweight Streaming 3D Gaussian Splatting for Real-time Rendering https://arxiv.org/abs/2507.21572 https://arxiv.org/pdf/2507.21572 https://arxiv.org/html/2507.21572

Li, Jiang, Feng, Gan, Zhao, Liu, Leng, Guo: SLTarch: Towards Scalable Point-Based Neural Rendering by Taming Workload Imbalance and Memory Irregularity https://arxiv.org/abs/2507.21499 https://arxiv.org/pdf/2507.21499 https://arxiv.org/html/2507.21499

Yuang Peng, Jiarui Zhong, Yang Zhang, Hong Cai Chen: Automated HEMT Model Construction from Datasheets via Multi-Modal Intelligence and Prior-Knowledge-Free Optimization https://arxiv.org/abs/2507.21430 https://arxiv.org/pdf/2507.21430 https://arxiv.org/html/2507.21430

[2025-07-30 Wed (UTC), 4 new articles found for csAR Hardware Architecture]