Andes Technology

We’re excited to launch RISC-V Now! by Andes - a global conference series focused on deploying RISC-V in production at scale. Taking place in Silicon Valley on Apr 20–21, 2026. Plus events in Hsinchu, Shanghai & Beijing. Learn more: andestech.com/en/2026/02/0...
#RISCV

The RISC-V Annual Report highlights an important shift & not just in adoption, but in architectural maturity. Milestones like RVA23 signal growing alignment on software-ready, scalable RISC-V platforms. As #RISCV evolves, clarity, long-term stability & innovation matter.

riscv.org/about/annual...

This week, the Andes NA sales, marketing, & FAE teams met for an offsite to reflect on 2025 & align on what’s ahead. Joined by colleagues from Taiwan, we strategized, connected, & collaborated at the conference room & pickleball court. Looking forward to 2026!

As the holidays approach, we want to thank our customers, partners, and the global RISC-V community for your trust and collaboration throughout 2025.

Wishing you a joyful and peaceful Christmas from all of us at Andes Technology.

Marc Evans shares a grounded view on what 2025 says about RISC-V: this isn’t a slowdown - it’s maturation. As the ecosystem moves from hype to execution, long-term value comes from the ability to ship, support, and scale. #RISCV

Read more: www.linkedin.com/pulse/enough...

Last call to register for AI Everywhere by EE Times! Our updated session time is Dec 10, 1:35–1:55 PM EST.
Join Simon Wang for “The Third Processor Revolution: AI + RISC-V” to learn why RISC-V’s flexibility & efficiency make it ideal for next-gen AI.
Reg: aieverywhere.eetimes.com?utm_source=a...

Andes is honored to be recognized at the 2025 EE Awards with three distinctions, including Best AI Solution Platform and Best IP/Processor. Our deepest gratitude to our partners, customers, and ecosystem for your support as we continue advancing RISC-V and AI innovation.
#EETimes #RISCV

Still energized from #SC25! We loved the RISC-V HPC workshop and appreciated the opportunity to reconnect with partners and customers, including D-Matrix, Phison, Dnotitia, Axelera, NVIDIA, Western Digital, and XCENA. Exciting to see the RISC-V ecosystem growing.

#RISCV

Andes is joining AI Everywhere by EE Times, a virtual event on the rapid evolution of AI in data center & edge computing. Catch our 12/10 talk, 1:15PM PST: “The Third Processor Revolution After Wintel & Mobile/Arm: AI + RISC-V”
Reg: aieverywhere.eetimes.com?utm_source=a...
#EETimes #AIEverywhere

Great momentum for RISC-V at #SC25! Our sister company
Condor Computing presented “Cuzco from Open-source to a High Performance Computing CPU Design” at the RISC-V for HPC Workshop. Stop by Andes Technology Booth #6259 to learn more!
#RISCV #HPC #OpenSourceHardware

Excited to announce that d-Matrix has chosen the Andes AX46MPV RISC-V CPU IP for its next-gen Raptor AI inference accelerator! Raptor combines 3DIMC with our high-performance vector CPU to deliver fast, efficient datacenter-scale inference.
Read more at: andestech.com/en/2025/11/1...

We’re proud to see our sister company, Condor Computing, presenting at #SC25! Don’t miss Shashank Nemawarkar’s talk, “Cuzco from Open-source to a High Performance Computing CPU Design,” at the RISC-V for HPC Workshop on Monday, Nov 17 (9:00–9:30 AM CST, Room 242).
#RISCV #HPC

Thank you RISC-V International for an incredible #RISCVSummit! Great to connect with our ecosystem partners, BrainChip, Arteris, Baya Systems, proteanTecs & S2C EDA, and share Andes innovations in AI, security & next-gen RISC-V CPU IP.
#RISCV #RISCVEverywhere

Day 1 of the 2025 RISC-V Summit was a great success! We're back for day 2 and would love for you to stop by and say hi at booth P6 😀

See the RISC-V ecosystem in action at Andes Booth P6 at the #RISCVSummit! Live partner demos from Arteris IP, Baya Systems, BrainChip, proteanTecs & S2C EDA - spanning design, AI, and system performance. Follow Andes on LinkedIn + visit our booth for raffle prizes!
#RISCV

RISC-V is reshaping modern computing - open, extensible, and powering 13B+ cores worldwide.

As a founding member of RISC-V Intl., Andes Technology leads with AI-ready vector processors and global summit engagement.

🔗 Read more: semiwiki.com/ip/andes-tec...

#RISCV #RISCVEverywhere

Andes is a proud Platinum Sponsor at #RISCVSummit2025! Join us for our latest RISC-V CPU IP innovations driving AI, embedded, and high-performance computing. Save 20% on registration with code RVS25AND20 → events.linuxfoundation.org/riscv-summit...
#RISCV #RISCVEverywhere

We’ve officially kicked off at TSMC OIP 2025! Swing by booth 619 and see how Andes is pushing RISC-V innovation from AI to edge devices (and more).

Last call to register and join TSMC North America OIP for tomorrow! We'll have a raffle at our booth for a chance to win an iPhone 17.

We’re headed to TSMC NA OIP 2025 on Sept 24 in Santa Clara! This year’s theme: Proliferating AI Advancements. See how Andes is driving next-gen RISC-V CPU IP for AI & HPC alongside the TSMC ecosystem.
Reg: tsmc.com/static/engli...

#TSMC #TSMCOIP2025 #ProliferatingAIAdvancements

We are live at AI Infra Summit and will be here through Thursday. Come say hi at booth 1706!

On @SemiWiki, Kalar Rajendiran covers @Condorcomputing's Cuzco CPU, unveiled at #HotChips2025. With a time-based OOO & slice-based design, it boosts performance-per-watt & scalability for #RISCV in datacenter, mobile, & automotive.

semiwiki.com/ip/andes-tec...

Andes is headed to #AIInfraSummit from 9/9-9/11 in Santa Clara! Catch our Distinguished Solutions Architect, Darren Jones, on the panel “Chip Design: Power Efficient Chips – Edge to Data Center” with Arteris, Movellus, Sagence AI & Cadence
#RISCV #ChipDesign

Condor’s Cuzco RISC-V Core at Hot Chips 2025 Condor Computing, a subsidiary of Andes Technology that creates licensable RISC-V cores, has a business model with parallels to Arm (the company) and SiFive.

Condor Computing, a subsidiary of Andes Technology, made waves at #HotChips2025 with its Cuzco core. Now featured in Chips and Cheese, Cuzco’s wide OoO design + time-based scheduler mark a leap in high-performance #RISCV CPUs.

Read the article here: chipsandcheese.com/p/condors-cu...

Andes & Condor Computing are going to the 2025 AI Infra Summit! Our Distinguished Engineer, Darren Jones, discusses: “Chip Design: Designing Power Efficient Chips - from the Edge to the Data Center.” Come learn how we're pushing AI with RISC-V.
Reg: ai-infra-summit.com/events/ai-in...

We're at Hot Chips with Kalar Rajendiran - come say hi!

RISC-V basics: The truth about custom extensions - EDN Adding custom extensions means taking ownership of both hardware design and the corresponding software toolchain.

General-purpose CPUs can’t meet today’s AI, automotive, and edge demands. EDN highlights how RISC-V + customization unlock new performance. Andes ACE™ + CoPilot make it practical for all teams.

Read more in EDN: www.edn.com/risc-v-basic...

#RISCV #SoCDesign #CPU #EDN

We’re headed to #HotChips2025!
Catch Condor Computing, our U.S. subsidiary, presenting “Cuzco: A High-Performance RISC-V RVA23 Compatible CPU IP” for a deep dive into next-gen CPU HPC microarchitecture.
Reg: hotchips.org
#RISCV #CPUdesign #CondorComputing #SoCDesign

YouTube video by Andes Technology SanjayTechCafe_Andes & Condor Computing: Leading the RISC-V Revolution in High-Performance AI IP

From AI accelerators to CUDA on RISC‑V, Andes is powering the next era of computing. 30% of global CPU IP shipments (16B+ products), trusted by Meta, EdgeQ & Tetramem, and now launching Condorcomputing. Watch our Sanjay TechCafe Interview: youtube.com/watch?v=Q4t1...
#SanjayTechCafe

General purpose CPUs can’t keep up with today’s specialized workloads. In @designreuse, Marc Evans of Andes USA shows how ACE & CoPilot enable custom RISC-V processors for IoT, AI & 5G.

Read more: www.design-reuse.com/article/6161...

#RISCV #SoCDesign