Semiconductor Engineering

What's Different About HBM4 New DRAM standard aims to solve a critical bottleneck.

The new HBM4 standard, how it compares with HBM3, and what will be needed to meet the insatiable demands of hyperscaler data centers in the future.
semiengineering.com/whats-differ...

#HBM #HBM4

Chip Industry Week in Review Big winners from Apple's new $100B investment; Intel CEO responds to Trump's resignation demand; 100% tariff threats; Si2's new LLM benchmarking coalition for design; IP theft; Teradyne's HBM tester; ...

Latest news: Intel CEO responds to Trump’s demand; big winners from Apple’s new $100B; 100% tariff threats; Si2’s new LLM benchmarking; IP theft; HBM; Europe’s SLMs; AMD-Arteris deal; ASE’s digitized scent deal; 3D-IC electromigration
semiengineering.com/chip-industr...

#semiconductor

SDVs And AI Forcing Big Changes In Automotive Advancements in vehicle architectures, AI, and security are reshaping the future of the car.

The auto industry is undergoing a fundamental transformation that includes everything from SDVs, the injection of AI into nearly every facet of the design and use case of a vehicle, and a complete overhaul of traditional relationships
semiengineering.com/sdvs-and-ai-...

#automotive #AI #SDVs

Chip Industry Week in Review Big winners from Apple's new $100B investment; Intel CEO responds to Trump's resignation demand; 100% tariff threats; Si2's new LLM benchmarking coalition for design; IP theft; Teradyne's HBM tester; ...

Latest news: Intel CEO responds to Trump’s demand; big winners from Apple’s new $100B; 100% tariff threats; Si2’s new LLM benchmarking; IP theft; HBM; Europe’s SLMs; AMD-Arteris deal; ASE’s digitized scent deal; 3D-IC electromigration
semiengineering.com/chip-industr...

#semiconductor

Agentic AI: Lots Of Little Black Boxes Security issues may be magnified by the number of agents and their potential interactions, not all of which may be obvious to chipmakers.

AI is changing so quickly that it’s not always clear how much of a security threat it poses for semiconductor design, and that uncertainty increases as AI agents are introduced into the mix.
semiengineering.com/agentic-ai-l...

#AgenticAI #chipdesign #EDA #AI #cybersecurity

Security Tradeoffs: A Difficult Balance Lack of security metrics, and the increasing adoption of chiplets, 2.5D architectures, and AI all complicate security.

Part 2 of a roundtable series with 7 experts:
Semiconductor Engineering discussed hardware security challenges, including new threat models from AI-based attacks
semiengineering.com/security-tra...

#HardwareSecurity #semiconductor #AI #AIattacks

Issues In Ramping Advanced Packaging Why traditional daisy chain approaches fall short.

Issues In Ramping Advanced Packaging:
How to obtain data at critical points, how to isolate it from other data, and how much data is required to identify real and latent defects.
semiengineering.com/issues-in-ra...

#semiconductortest #semiconductor #advancedpackaging

Can Cheaper Lasers Handle Short Distances? VCSELs may serve in more non-photonic applications.

Optical technology is well established for long-haul communications, but the distances it serves are shrinking — especially in the data center.
semiengineering.com/can-cheaper-...

New technical papers recently added to Semiconductor Engineering’s library
semiengineering.com/chip-industr...

#semiconductor #analog #interconnects #photonics #GPU

How AI Will Impact Chip Design And Designers
A roundtable of six experts discuss how AI is reshaping EDA, and how it will help chipmakers to focus on domain-specific solutions. semiengineering.com/how-ai-will-...
With experts from Keysight, Synopsys, ChipAgents, Cadence, Siemens and Baya Systems.

Chip Industry Week in Review Tariffs; $16.5B Samsung-Tesla deal; China's backdoor worries; Ambiq goes public; big funding for AI and e-beam; Silvaco buys Mixel; AI breaches; interconnects in-depth; chiplet architectures; AI-power...

Latest news in the chip industry semiengineering.com/chip-industr...

#semiconductor

For Chip Developers, HW/SW Co-Design Key To Data Center Efficiency Every aspect of data center energy use must be optimized to reduce power consumption and enable more sustainability, from chips to transformers and edge compute.

Chip designers, EDA vendors, and the data centers themselves have a long list of options available to them to help curb AI’s power consumption.
semiengineering.com/for-chip-dev...

#AI #powerconsumption #datacenter

Changes In Scan Test Data Better management of data in multi-core designs.

Changes In Scan Test Data
Better management of data in multi-core designs.
semiengineering.com/changes-in-s...

#semiconductor #chiplets #ScanTest

On-Die And In-Package Interconnects A 94-page research report on interconnect fundamentals for semiconductor engineers.

Special Report: A 94-page research report on interconnect fundamentals for semiconductor engineers. No cost with email signup.
semiengineering.com/on-die-and-i...

Machine Learning Tools Help Bridge Design-To-Manufacturing Gap Despite the AI hype, ML tools really are proving valuable for leading-edge chip manufacturing.

Machine Learning Tools Help Bridge Design-To-Manufacturing Gap
semiengineering.com/machine-lear...

#semiconductor

CMOS 2.0: Layered Logic For The Post-Nanosheet Era imec’s 3D platform upends the way devices are built. Focus shifts from transistors to systems.

Special Report: imec’s 3D platform upends the way devices are built. Focus shifts from transistors to systems.
semiengineering.com/cmos-2-0-lay...

#semiconductor

Chip Industry Week in Review:
Intel’s rebound plan; ST to buy MEMS/sensor biz; CUDA for RISC-V; US AI policy; global equipment $ top 13 tech trends; copper concerns; data center mania; EUV free electron laser; CFETs; panel-level packaging and ...
semiengineering.com/chip-industr...
#semiconductor

The Rise Of Panel-Level Packaging AI and HPC are fueling much-needed investment in panel-level tooling and processes.

An insatiable demand for logic to memory integration for AI and high-performance computing is driving progress toward very large-format packages, which are expected to approach 10 times the maximum reticle size in the next few years.
semiengineering.com/the-rise-of-...

#semiconductor

When Can I Buy A Chiplet? A chiplet ecosystem is under development, but many barriers must be overcome before a thriving marketplace can exist.

A chiplet ecosystem is under development, but many barriers must be overcome before a thriving marketplace can exist.
Part 1 of a roundtable with 5 experts.
semiengineering.com/when-can-i-b...

#chiplet

New technical papers recently added to Semiconductor Engineering’s library:
semiengineering.com/chip-industr...

#semiconductor

Crisis Ahead: Power Consumption In AI Data Centers Four key areas where chips can help manage AI's insatiable power consumption.

Four key areas where chips can help manage AI’s insatiable power consumption.
semiengineering.com/crisis-ahead...

Semiconductor Engineering's latest Test, Measurement and Analytics newsletter semiengineering.com/newsletter/t...

#semiconductor

Often Overlooked, PHYs Are Essential To High-Speed Data Movement From smartphones to AI factories, physical layers are the unsung heroes of data communications.

The physical layer has become increasingly important in data centers, where huge volumes of data need to be processed, stored, and moved back and forth.
semiengineering.com/often-overlo...

Chip Industry Week in Review AI chip sales to China resume; TSMC accelerates U.S. production; Synopsys-Ansys done deal; Chinese espionage; Nikon's new litho system; SiC, GaN buildout; CPO market; rowhammer attack on GPUs; Q2 star...

Latest news in the semiconductor sector semiengineering.com/chip-industr...
#semiconductor

Can Today’s Processor Architectures Be More Efficient? The low-hanging fruit of processor optimization may be gone, but new technologies are emerging.

The low-hanging fruit of processor optimization may be gone, but new technologies are emerging.
semiengineering.com/can-todays-p...

#processors #lowpower #semiconductor

AI In Chip Design: Tight Control Required Why and where limitations are needed in AI-driven design, and where software-defined hardware works best.

AI In Chip Design: Tight Control Required
Panel of experts talk about what’s needed to effectively leverage AI, who benefits from it, and where software-defined hardware works best
[Part 3]
semiengineering.com/ai-in-chip-d...

#EDA #chipdesign #AI #semiconductor

How Advanced Packaging Is Reshaping Inspection Next-generation optical inspection is about more than just sensitivity. It’s about reliably seeing through complexity.

Special Report: Next-generation optical inspection is about more than just sensitivity. It’s about reliably seeing through complexity.
semiengineering.com/how-advanced...

#semiconductor #advancedpackaging #inspection

Data Center CPU Dominance Is Shifting To AMD And Arm AMD is close to surpassing Intel in x86, but Arm thinks it can take the lead over x86.

Opinion piece by Geoff Tate
semiengineering.com/data-center-...

Chip Industry Week In Review TSMC's liquid cooling; copper supply risks; EU's new GenAI rules; SIA's state of the industry report; GF acquires MIPS; LPDDR6 standard; memory market reports; GPU threat model; NPU technology to boos...

News: SIA’s state of the industry report; TSMC’s liquid cooling; copper supply risks; EU’s AI rules; GF acquires MIPS; LPDDR6 standard; memory market reports; GPU threat model; quantum fundings, research; advanced packaging inspection and more..
semiengineering.com/chip-industr...

#semiconductor

Detecting Slips, Scratches, And Cracks In Wafers Becoming Harder Finding skinny defects requires a range of wavelengths.

Defects that manifest as slips, scratches, and micro-cracks continue to bedevil the prevalent optical inspection methods.
semiengineering.com/detecting-sl...

#semiconductor #defects