Nick Brown

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An MLIR Lowering Pipeline for Stencils at Wafer-Scale The Cerebras Wafer-Scale Engine (WSE) delivers performance at an unprecedented scale of over 900,000 compute units, all connected via a single-wafer on-chip interconnect. Initially designed for AI, th...

Preprint at arxiv.org/abs/2601.17754

Excited our paper on stencil compiler for @cerebrassystems.bsky.social #WSE has been accepted to ASPLOS . Using MLIR, without any code changes across three frontends we have highly competative performance against manually written code and around 14x performance of 128 A100 GPUs.

Recurring theme of @hipeac.bsky.social this week has been the intersection of compilers and architectures to address challenges in #ai, especially llm. Really exciting when @jocare.bsky.social announced #HiPEAC 2027 will be held in Glasgow!

In Krakow this week for @hipeac.bsky.social , Teresa from #BSC kicking off the #RISCV for #HPC workshop, a day of interesting talks and discussions

Very true, and lots to be said for it as it makes debugging rather simple and means can easily leverage a bunch of different compilers and their optimisations as the "backend" so you don't need to reinvent wheel

My PhD student Gabriel had a busy time at #SC25 and has written up his experiences, especially presenting a couple of papers leveraging #MLIR for #FPGAs. One at the LLVM workshop on a Fortran+OpenMP flow for #Xilinx #FPGAs and another at H2RC workshop on a Fortran intrinsics flow for AI engines

There are lots of exciting #HPC and #AI projects going on at @epcc.bsky.social , with quite a few more to start in 2026. Come join us!

Thanks @kieranleach.bsky.social for doing a great tour of the @epcc.bsky.social #ACF facility for Christian from @unipaderborn.bsky.social and @stevenwright.bsky.social from @yorkuniversity.bsky.social. I always learn a lot from these, and was great to see the new #Cirrus on its 1st day of service

Hi Jan, the University will publish it at (at some point!) but if you are interested I can certainly send you a link to a local copy (I will check with Mark on this but can't imagine he will have any issues). He certainly leveraged the HBM, I think it would be OK on U250 etc too but slower

Many congratulations to my @epcc.bsky.social PhD student Mark Klaisoongnoen who passed his PhD viva today! Exploring accelerating financial workloads on #FPGAs, Mark researched techniques for improving performance & energy efficiency. The U280 was a prop only, he doesn't get to keep it ;)

Nick Brown from @epcc.bsky.social is up now.

Attending #CIUK25? Our colleagues are looking forward to meeting you! Find us at the stands for ARCHER2-Cirrus and the CAKE Network Plus.
EPCC at #CIUK2025:https://edin.ac/4pR8dpL

Very cool, a home made Motorola 68k system on breadboard with 512KB of RAM and booting Linux from ROM. Hooked up and specialised by Jeremy Cohen from Imperial based on design by Steve Chamberlin. Running Linux to play Colossal Cave Adventure over uart

Regardless, it was much larger than last time in St. Louis :) A couple of sessions I went to felt a bit smaller than counterparts at SC24, but it's always difficult to tell. Exhibition (as always) seemed very large - walking through to the stadium pitch for part of the exhibition was pretty cool :)

Sorry I couldn't be there today as I was involved in the H2RC workshop at the same time, but it looks like you had a great session :)

It's our last day at #SC25!
@nickbrown-hpc.bsky.social and Gabriel Rodriguez-Canal will present their paper 'Programmer productivity and performance on AMD's AI Engines: Offloading Fortran intrinsics via MLIR a case-study'.
Find them in 263-264 at 9:38am CST.

Well-done to my PhD student Gabriel Rodriguez-Canal @epcc.bsky.social who gave a great talk about our work support Fortran intrinsics on #AMD #AIEs at #SC25 #H2RC. The first step in #AIE Fortran support. dl.acm.org/doi/pdf/10.114…

Fascinating talk by Ilan Tayari from @nextsilicon.com at #SC25 #H2RC about Maverick 2. Based on dataflow help solving the issue with traditional architectures around (very) low ALU occupancy, their architecture will move #HPC away from Von Neumann architecture

I really enjoyed chairing the panel on an open #HPC ecosystem at #SC25 Thanks to @fclc.bsky.social from @tenstorrent.bsky.social , Teresa from @bsc-cns.bsky.social, Tony from #Redhat, Daniele from #E4computer-engineering and Penporn from @developers.google.com

Was really great to meet @jeffgeerling.com at the @epcc.bsky.social booth at #SC25, we had a fascinating chat and I was really inspiring to hear about some of Jeff's projects and activities. Also really cool to chat with him about our Raspberry PI mini supercomputer #WeeArchie

Attending #SC25? See our website for all our SC activities: www.epcc.ed.ac.uk/whats-happen...

Well done to my @epcc.bsky.social PhD student Gabriel Rodriguez-Canal who presented his paper at the #LLVM #SC25 workshop today on an MLIR-based Fortran & OpenMP flow for #AMD #FPGAs.

Preprint at arxiv.org/pdf/2511.08713

Yup, we will upload slides to riscv.epcc.ed.ac.uk/community/wo... and all papers are already available at dl.acm.org/doi/proceedi...

A wide range of talks so far this morning at the @riscv.org.web.brid.gy #SC25 workshop. Driving analogue systems from #RISCV, coupling with spiking neural networks, and profiling tooling all demonstrates the flexibility the technology gives us to do cool things

Shashank Nemawarkar from #condorcomputing, part of #andes , kicks off the @riscv.org.web.brid.gy workshop at #SC25 talking about #hpc CPU design. Lots of interesting talks ahead this morning.

Steve Dean from HPE kicking off the “Sustainable Supercomputing” workshop at #SC25 - the room is pretty packed already, but there are a few more seats in room 264 if you want to join. Lots of interesting presentations still to come!

Was great to visit @ncar-cisl.bsky.social last week in Boulder and Cheyenne, we have a centre to centre collaboration via the #EPSRC #CONTINENTS project and they have some really impressive facilities and work. Great discussions ahead of then travelling to St. Louis for #SC25 this week

The @epcc.bsky.social #SC25 booth starting to go up, hanging sign and all

We’re Showcasing RISC-V at SC25, the World’s Largest Supercomputing Conference I’m heading to SC25 in St. Louis next week to advocate for the growing role of RISC-V in high-performance computing (HPC), alongside my peers in the RISC-V HPC special interest group (SIG).

Thanks @riscv.org.web.brid.gy publishing my article highlighting #RISCV activities coming up at #SC25 this week, a workshop on Monday morning showcasing some of the latest developments and then a panel on adopting a fully open #HPC ecosystem on Thursday 1:30pm

riscv.org/blog/risc-v-...