RascalFoxfire aka. the funky CPU fox

Finally something to show! Here the output of my GPU running a shader which transforms a hexagon crystal in different ways. Fully programmable, runs independent of the CPU and is suprisingly fast (1 vertex transformation per 4 clock cycles). Next stop: expanding the rasterizer and texturing!

Another side quest done, got my NISC ISA into logisim as its most basic (BI32) instruction set. Currently testing a lot. Hmmm... lets see what my brain is going to do next

Okay, i am finally done with the core parts of the NISCy hybrid ISA. I am satisfied with the result as it is quite elegant. Now i have the urge of putting it in SysVerilog and compare it with an equal optimized RISC-V. But eh, next goes back to the GPU, then the compiler

Switched tasks again, redesigned my entire NISC hybrid arch. The old lacked immediate formats and the compressed set was just garbage. What i have now is finally usable

Why does that sound exactly like the War Thunder in game chat in every battle...

Currently a lil busy on my end so no new updates on my GPU. But it could be possible that my Picowizard CPU finally gets a real use case

Got something of a simple rasterizer. I basically just do a limit test and then horizontally raster one line each. Bresenham for the win. Now to the testing and finishing the stream mechanism...

E, i could implement that at some point. That would be later for the pixel unit and parts of the rasterizer to do. Next goal is getting just dots rastered and then go with lines and triangles

Some updates! I worked further on the GPU, fixed some timing issues with the transformer unit and nearly finished the memory unit responsible for parallel loading and storing a data stream via its two low bit interleaved RAM blocks (Logisim Evo doesn't have simple dual port RAM...)

Okay, slowly getting behind rasterization. But still will take a while. I guess i will move the UV calculation to the future

I think i am a lil oversaturated with circuit tinkering rn. Gonna take a lil break but will be back very soon

Current status: binge watching videos about rasterization techniques

Slow progress, still studying the OpenGL thing but i guess i take the simple route out here and go with my gut feeling. It is my first 3D GPU so it is all experimental and nothing to shame when not working that well

Progression is very slow rn. Still need to think about how to build the rasterizer. I guess it is time making a deep dive into OpenGL

okay, minor correct, now the vertex unit runs. And i think i found a solution for primitive assembly and some parts of rasterization... i hope i can soon render my first dot on the screen

Okay, vertex pipeline in my GPU done. It is literally the most stupid approach but it should hold for all vertex shader operations. Onward to primitive assembly! I have zero idea how to do that...

I found a solution that also solves my rotation problem! I use 16 arch registers as a 4 x 4 transformation matrix which i send to each execution pipeline for different purposes. As a transformation/vertex unit i'll just build a simple tensor core using that matrix on the vertics stream

Update on my GPU: i am redesigning the GPU from ground up. The streaming CISC idea was good, the organization not

I think i found a solution for the rotation matrix conundrum. Next i'll try to build the rasterizer as quick as possible to at least get some point drawing action ready

Brain puzzle time: how to pipeline an execution unit responsible for rotating a vertex? Well, for a single axis rotation we need sin, cos and -sin, with a little magic just two lookups. Quite a funny one but i should get it running within this week

Small update: i am currently changing the plan of the software 3D renderer for SuperSatellit. I need more hardware support to make it bearable in any way so i decided to build two things: a fast memcopy unit and a simple 3D graphics card. Hardware wins again, but i won't throw out the software idea

Slow progress here. Still on the 3D renderer, sadly not much to show currently except for maybe code. But eh, hope i get at least some wire frame stuff soon

Currently on it! I am currently deep into the vertex shader, writing the routines to transform the vertics in assembler. Object format and how the drawing pipeline is formated are already done! And welcome on the hardware train! Here you will see how software and hardware work together in "harmony"

Meanwhile in the fox head quarter: i am coding on my compiler. I am also coding on an example program for SuperSatellit (a software 3D renderer losely based on OpenGL). And i also found back to writing on my book. More updates coming very soon

I packed it full with a lot of new stuff i had to develop over time like the half precision FPU and the MMU. It also comes with 4-stage partial forwarding pipeline, interrupts with different priorities, timer, ring mode, a lot of MMU configurations, separate main memory/IO address space, ...

Ladies and gentlemen, SuperSatellit, my 16 bit high performance OS ready CPU based on the same named custom ISA, is done! I still need to do a lot of testing and expanding some parts like the MMU and FPU but all features are in!

And switched tasks again. Buuuut i am back at the large 16 bit CPU of mine! And now with some great news: i got the half precision FPU running! Still need to implement the edge cases but SuperSatellit can now technically do 3D stuff and more! If someone need it, i can put it on GitHub

Found out a way for scalable register renaming and dependency solving between pipelines! That is now for my PRF 4-way OoOE CPU version. Free list is also implemented and ready to go. Next will be the actual PRF and the register port scheduler

As a german bread enjoyer i can confirm: perfection

Not much going on here, just further tinkering on my compiler and the OoOE CPUs. Still alive (at least i think... so am i?)