Prashant Nair

Lead Author: Jeonghyun Woo
Co-Authors: Shaopeng Lin, Aamer Jaleel, and Gururaj Saileshwar (4/4)

QPRAC: Towards Secure and Practical PRAC-based Rowhammer Mitigation using Priority Queues JEDEC has introduced the Per Row Activation Counting (PRAC) framework for DDR5 and future DRAMs to enable precise counting of DRAM row activations. PRAC enables a holistic mitigation of Rowhammer atta...

Second, we design a fundamentally secure and practical tracker that implements the Per-Row Activation Counting (PRAC) specification for #DDR5 with only 15 bytes/bank overhead (3/4):

Read the paper: arxiv.org/abs/2501.18861

DAPPER: A Performance-Attack-Resilient Tracker for RowHammer Defense RowHammer vulnerabilities pose a significant threat to modern DRAM-based systems, where rapid activation of DRAM rows can induce bit-flips in neighboring rows. To mitigate this, state-of-the-art host-...

First, we investigate how #rowhammer trackers can be exploited for performance-based attacks and propose a more robust tracker (2/4):

Read the paper: arxiv.org/abs/2501.18857

Are you attending the International Symposium on High-Performance Computer Architecture (HPCA 2025)? If so, be sure to stop by Session 8A on Tuesday March 4th to check out our two exciting papers (attached as arXiv links below) on the #rowhammer #computersecurity phenomenon in #dram (1/4):