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Greg

@gregdavill.bsky.social

ASIC/FPGA/PCB/FW engineer at ASTC ๐Ÿง™โ€โ™‚๏ธ (He/Him) I also take macro photos of electronics

873 Followers  |  240 Following  |  122 Posts  |  Joined: 17.11.2024  |  2.364

Latest posts by gregdavill.bsky.social on Bluesky

Board manufacturer date of wk10 2024. Wild that this issue is still making it into designs.

28.09.2025 23:08 โ€” ๐Ÿ‘ 2    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
Preview
a man in a yellow shirt is sitting in a chair holding a cup and pointing ALT: a man in a yellow shirt is sitting in a chair holding a cup and pointing

Did you have the same reaction? ๐Ÿคฃ

26.09.2025 06:16 โ€” ๐Ÿ‘ 7    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
Circuit board with bodge wire neatly snaking between passives. Connecting two vias.

Circuit board with bodge wire neatly snaking between passives. Connecting two vias.

Terminal output from nextpnr showing an error that T16 is not available on this package.

Terminal output from nextpnr showing an error that T16 is not available on this package.

nextpnr output showing device usage around 15% of the logic for a HS USB core and QSPI logic to implement a boot loader.

nextpnr output showing device usage around 15% of the logic for a HS USB core and QSPI logic to implement a boot loader.

I'd forgotten that the ECP5-25F doesn't have all the I/O, and 4 or so pins that are on the 45/85F are N/C on the 25F. I just happened to use one of these for the ULPI interface. ๐Ÿฅฒ

Bodge wire to the rescue! Now we're enumerating again!

USB boot loader in gateware, takes up ~15% of the device

02.09.2025 12:30 โ€” ๐Ÿ‘ 13    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0

If by fab house, you mean my a toaster oven in my fabulous houses garage? Then yes. ๐Ÿ™Œ

01.09.2025 22:41 โ€” ๐Ÿ‘ 6    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
Assembled circuit board with soldering defect. A tombstoned part. In which a 2 terminal passive is only soldered to one side so it raises up like a tombstone.

A small yellow sticker with an arrow points at the defect on the board.

Assembled circuit board with soldering defect. A tombstoned part. In which a 2 terminal passive is only soldered to one side so it raises up like a tombstone. A small yellow sticker with an arrow points at the defect on the board.

Tombstone time

01.09.2025 22:34 โ€” ๐Ÿ‘ 12    ๐Ÿ” 0    ๐Ÿ’ฌ 2    ๐Ÿ“Œ 0

Small update to PCB and I forgot to buy a new stencil ๐Ÿ˜…

01.09.2025 22:09 โ€” ๐Ÿ‘ 2    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
Circuit board with a large BGA footprint. Some pads on the BGA package are larger than others.

Circuit board with a large BGA footprint. Some pads on the BGA package are larger than others.

Circuit board with a large BGA footprint. All the pads on the BGA package are the same size.

Circuit board with a large BGA footprint. All the pads on the BGA package are the same size.

These two boards have the same BGA geometry defined in their gerbers. For some reason JLCs DFM adjustments have expanded all the "via in pad" connections.

Makes for an interesting visual effect.

01.09.2025 12:55 โ€” ๐Ÿ‘ 17    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
Circuit board with solder paste applied. The photo is close enough so you can just start to make out the tiny spheres that make up solder paste.

There are 2 components which don't have solder paste applied.

Circuit board with solder paste applied. The photo is close enough so you can just start to make out the tiny spheres that make up solder paste. There are 2 components which don't have solder paste applied.

Circuit board with solder paste applied. The photo is close enough so you can just start to make out the tiny spheres that make up solder paste.

There are 2 components which don't have solder paste applied.

Circuit board with solder paste applied. The photo is close enough so you can just start to make out the tiny spheres that make up solder paste. There are 2 components which don't have solder paste applied.

How's my solder paste application?

I think I missed some spots. ๐Ÿซฃ

01.09.2025 11:32 โ€” ๐Ÿ‘ 12    ๐Ÿ” 0    ๐Ÿ’ฌ 3    ๐Ÿ“Œ 0

When I started using brand name AMTECH flux. I realised it had a โ€œsweetโ€ smell, then immediately bought a fume extractor, because I realised if I was smelling that I was 100% inhaling the rosin and additive vapours ๐Ÿ’จ๐Ÿ˜ตโ€๐Ÿ’ซ

01.09.2025 01:46 โ€” ๐Ÿ‘ 2    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
ECPBreaker FPGA development board featuring a Lattice ECP5 FGPA. Being programmed via JTAG from an ORBTrace, that is powered by a Lattice ECP5.

ECPBreaker FPGA development board featuring a Lattice ECP5 FGPA. Being programmed via JTAG from an ORBTrace, that is powered by a Lattice ECP5.

FPGAs programming FPGAs ๐Ÿข

23.08.2025 02:53 โ€” ๐Ÿ‘ 20    ๐Ÿ” 1    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
Saleae trace with QSPI signals shown

Saleae trace with QSPI signals shown

The bodge works!
A DFF in front of the ECP5's FPGA SPI configuration port before a mix leading to FLASH and PSRAM. Enabling an initial jump through FLASH where the clock frequency is bumped and QSPI entered.
This now fixes an issue violating the PSRAM's tCE<8us requirement.

17.08.2025 10:41 โ€” ๐Ÿ‘ 10    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0

Iโ€™ve noticed looking at some modern SMD 32k quartz crystals may have what look like laser trim dots on the forks. Could that be one reason to manufacture these with a glass top rather than metal?

17.08.2025 04:39 โ€” ๐Ÿ‘ 3    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
PCB layout in KiCad showing a bodge plan

PCB layout in KiCad showing a bodge plan

Circuit board with bodge wires connecting a new component

Circuit board with bodge wires connecting a new component

Plan vs. Execution

The messier the plan the cleaner the bodge looks in comparison. ๐Ÿ˜…

16.08.2025 23:26 โ€” ๐Ÿ‘ 33    ๐Ÿ” 1    ๐Ÿ’ฌ 2    ๐Ÿ“Œ 0

Nicely done! Looks similar to the XPS I did the same mod to. Resistor straps to inform BIOS of larger DRAM parts. Luckily I got a board-view which shower the net names. Made it easy to work out the 16GB variant.

15.08.2025 05:01 โ€” ๐Ÿ‘ 5    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
USB-C with cable cut, showing only 3 wires: red, black and white.

USB-C with cable cut, showing only 3 wires: red, black and white.

USB-C with cable cut, showing only 3 wires: red, black and white.

USB-C with cable cut, showing only 3 wires: red, black and white.

Can't recall where this came from, but ended up in my labs cable drawer. Curious why it wouldn't enumerate.. ๐Ÿคฎ

14.08.2025 06:36 โ€” ๐Ÿ‘ 9    ๐Ÿ” 0    ๐Ÿ’ฌ 2    ๐Ÿ“Œ 0
Electrical schematic showing pin ordering into a connector. Next to the PCB layout which has silkscreen that in no way matches.

Electrical schematic showing pin ordering into a connector. Next to the PCB layout which has silkscreen that in no way matches.

Why is my circuit board lying to me ๐Ÿฅฒ

03.08.2025 07:57 โ€” ๐Ÿ‘ 6    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0

โ€œIโ€™d rather write the hwโ€ much easier ๐Ÿ˜†๐Ÿ˜†๐Ÿคฃ

26.07.2025 02:24 โ€” ๐Ÿ‘ 2    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0

Impedance control is a myth. A term made by big circuit to sell more ground planes. /s

27.06.2025 23:26 โ€” ๐Ÿ‘ 7    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0

Smoke test passed! ๐Ÿ”ฅ
Voltages all look good

24.06.2025 07:08 โ€” ๐Ÿ‘ 14    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
Circuit board propped up on a mechanical pencil

Circuit board propped up on a mechanical pencil

Circuit board in-front of a red coffee mug

Circuit board in-front of a red coffee mug

Circuit board in-front of a red coffee mug

Circuit board in-front of a red coffee mug

๐Ÿ˜ Freshly assembled, still not sure if the design even works ๐Ÿซฃ

24.06.2025 03:45 โ€” ๐Ÿ‘ 23    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
Assembly view of circuit board showing every decoupling capacitor highlighted

Assembly view of circuit board showing every decoupling capacitor highlighted

Decoupling? Yes. โœ…

12.06.2025 09:21 โ€” ๐Ÿ‘ 10    ๐Ÿ” 0    ๐Ÿ’ฌ 2    ๐Ÿ“Œ 0
Circuit board with solder paste applied

Circuit board with solder paste applied

Circuit board with solder paste applied

Circuit board with solder paste applied

Circuit board with solder paste applied

Circuit board with solder paste applied

Circuit board with solder paste applied

Circuit board with solder paste applied

A nice solder paste application ๐Ÿซ 

12.06.2025 09:13 โ€” ๐Ÿ‘ 12    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
Circuit boards alongside a 3d printed enclosure, solder paste stencil and some tools.

Circuit boards alongside a 3d printed enclosure, solder paste stencil and some tools.

Circuit board macro photo

Circuit board macro photo

Circuit board macro photo

Circuit board macro photo

Circuit boards are in! ๐Ÿ‘Œ

12.06.2025 01:42 โ€” ๐Ÿ‘ 23    ๐Ÿ” 1    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
CAD view of an enclosure designed around a circuit board

CAD view of an enclosure designed around a circuit board

Designed a quick and simple 3d printed case

02.06.2025 22:40 โ€” ๐Ÿ‘ 14    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0

Unfortunately not, this is actually an old ButterStick r0.2

31.05.2025 01:59 โ€” ๐Ÿ‘ 1    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
Video thumbnail

I've been using KiCad 9's new table features to aid in schematic documentation.

I guess it makes sense.. But still puzzled me for a moment that you can perform a vertical/horizontal mirror on a single cell. ๐Ÿ™ƒ

31.05.2025 01:50 โ€” ๐Ÿ‘ 11    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
3d CAD showing a fillet inside a corner of a part, the geometry is using native rounded surfaces, and looks clean.

3d CAD showing a fillet inside a corner of a part, the geometry is using native rounded surfaces, and looks clean.

Much better ๐Ÿ˜

10.05.2025 06:35 โ€” ๐Ÿ‘ 4    ๐Ÿ” 0    ๐Ÿ’ฌ 0    ๐Ÿ“Œ 0
View from 3d CAD, showing a rounded corner of an object, except it's not actually round, rather lot of straight lines.

View from 3d CAD, showing a rounded corner of an object, except it's not actually round, rather lot of straight lines.

Glad I can jump back in the timeline. Found the culprit!

Top object is an imported PCB, arcs on the board outline get converted to straight-line segments when it's exported from KiCad.

The purple lines are projected from this PCB outline. Then I've applied an offset to account for tolerance.

10.05.2025 06:18 โ€” ๐Ÿ‘ 1    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
3d CAD showing a rounded surface, that is made up small flat planes, rather than a continuous arc. A fillet has created awkward joins to these flat planes.

3d CAD showing a rounded surface, that is made up small flat planes, rather than a continuous arc. A fillet has created awkward joins to these flat planes.

Whoops, it's quick and easy to simply base 3d geometry off a KiCad board outline. But the topology has caught up to me. ๐Ÿซ 

10.05.2025 06:13 โ€” ๐Ÿ‘ 4    ๐Ÿ” 0    ๐Ÿ’ฌ 1    ๐Ÿ“Œ 0
Hand holding a circuit board with diffusion pattern

Hand holding a circuit board with diffusion pattern

Designed this board years ago, and finally ordered it. The pattern looks really cool on the physical boards.

github.com/gregdavill/a...

30.04.2025 10:08 โ€” ๐Ÿ‘ 43    ๐Ÿ” 1    ๐Ÿ’ฌ 3    ๐Ÿ“Œ 0

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