Ian Hanschen

I don’t have the BRAM for a depth buffer so it’s time to get the memory controller up and running for this fjord torus.

100% FPGA logic 3D pipeline, no CPU.

interested in the cosim infra

looks like it works now

the 3d rast pipeline is a tools-assisted speedrun. the combo of claude code + codex is turning what would have taken years into months.

YouTube video by John Romero Making Catacomb 3-D

www.youtube.com/watch?v=ZcUq...

maybe after I'm done with it

come warm yourself by my 100% FPGA logic 3D rasterization pipeline… while the geometry engine (also logic) cubes.

@foone.bsky.social this is what you're gonna guess it is, with a geometry engine bolted on to test it

First light on real hardware. I will call it what it is when I decide it is.

this is a no signaling zone

there's a special disease programmers get. basically, they build a lot of stuff and every time they fight with some framework. eventually they're like "I'm gonna write my own damn framework" and then they write their own framework that innovates on the frustration.

recently I rubber-ducky debugged something with claude code and then I used it to reconstruct some algorithms from expired patents so I could understand them. now it creates test benches, test harnesses, and does grunt work. we're not going back.

...no :)

you can guess what I'm working on.
you'll probably be right.

Got deep color (12 bits per channel) from the Terasic FMC-HDMI with the Altera Stratix V Advanced Systems Development Kit.

that's not a computer, it's an FPGA

whomever wrote dvi_tx/dvi_tx_tmds_enc for bit banged dvi (mike field?): thanks. modified it to encode dvi for altera's phy ip to use the hssi tx blocks on the arria v gx kit.

dig a little deeper

binge-coding with claude. reproduced the algorithms for hp color recovery from expired patents.

if I have to stare at it, it should probably look nice

this claude guy does fine work🤔

if you knew how I was doing this you would probably lose your shit

emulation progress

nice

random realization: it makes sense that the option rom header signature is 0x55 0xAA for the same reason those values are used when doing a hardware detection knock on the AT bus, or, recently, memory controller training: every other bit is set.
0x55 = 01010101
0xAA = 10101010

GitHub - ianhan/gmaker_pcfxga_sdk_docs_claude: English translations of NEC PC-FXGA GMAKER Starter Kit (DOS/V) SDK documentation - hardware specs, library APIs, tools, and file formats English translations of NEC PC-FXGA GMAKER Starter Kit (DOS/V) SDK documentation - hardware specs, library APIs, tools, and file formats - ianhan/gmaker_pcfxga_sdk_docs_claude

PC-FX GA GMAKER SDK Documentation (English Translation): github.com/ianhan/gmake...

chonk

thanks much

@tubetime.bsky.social did you toss your mcga documentation somewhere?